
ATMEGA32AU -8-bit AVR
The ATmega32A is a low power, CMOS 8-bit microcontrollers based on the AVR® enhanced RISC architecture. The ATmega32A is a 40/44-pins device with 32 KB Flash, 2 KB SRAM and 1 KB EEPROM. By executing instructions in a single clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed.
Features
• High-performance, Low-power AVR® 8-bit Microcontroller
• Advanced RISC Architecture
      – 131 Powerful Instructions
      – Most Single-clock Cycle Execution
      – 32 × 8 General Purpose Working Registers
      – Fully Static Operation
      – Up to 16MIPS Throughput at 16MHz
       – On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
       – 32Kbytes of In-System Self-programmable Flash program memory
       – 1024Bytes EEPROM
       – 2Kbytes Internal SRAM
       – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
       – Data retention: 20 years at 85°C/100 years at 25°C(1)
       – Optional Boot Code Section with Independent Lock Bits • In-System            Programming by On-chip Boot Program
• True Read-While-Write Operation
       – Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 Compliant) Interface
      – Boundary-scan Capabilities According to the JTAG Standard
      – Extensive On-chip Debug Support
      – Programming of Flash, EEPROM, Fuses, and Lock Bits through the            JTAG Interface
• QTouch® Library Support
      – Capacitive touch buttons, sliders and wheels
      – QTouch and QMatrix™ acquisition
      – Up to 64 sense channels ATmega32A megaAVR® Data SheetÂ
• Peripheral Features
      – Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
      – One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and        Capture Mode
      – Real Time Counter with Separate Oscillator
      – Four PWM Channels
      – 8-channel, 10-bit ADC
• 8 Single-ended Channels
• 7 Differential Channels in TQFP Package Only
• 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
      – Byte-oriented Two-wire Serial Interface
      – Programmable Serial USART
      – Master/Slave SPI Serial Interface
      – Programmable Watchdog Timer with Separate On-chip Oscillator
      – On-chip Analog Comparator
• Special Microcontroller Features
     – Power-on Reset and Programmable Brown-out Detection
     – Internal Calibrated RC Oscillator
     – External and Internal Interrupt Sources
     – Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down,        Standby and Extended Standby
• I/O and Packages
     – 32 Programmable I/O Lines
     – 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
• Operating Voltages
    – 2.7V - 5.5V
• Speed Grades
     – 0 - 16MHz
• Power Consumption at 1MHz, 3V, 25°C
     – Active: 0.6mA
     – Idle Mode: 0.2mA
     – Power-down Mode: < 1µA
Original: $4.93
-70%$4.93
$1.48ATMEGA32AU -8-bit AVR
The ATmega32A is a low power, CMOS 8-bit microcontrollers based on the AVR® enhanced RISC architecture. The ATmega32A is a 40/44-pins device with 32 KB Flash, 2 KB SRAM and 1 KB EEPROM. By executing instructions in a single clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed.
Features
• High-performance, Low-power AVR® 8-bit Microcontroller
• Advanced RISC Architecture
      – 131 Powerful Instructions
      – Most Single-clock Cycle Execution
      – 32 × 8 General Purpose Working Registers
      – Fully Static Operation
      – Up to 16MIPS Throughput at 16MHz
       – On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
       – 32Kbytes of In-System Self-programmable Flash program memory
       – 1024Bytes EEPROM
       – 2Kbytes Internal SRAM
       – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
       – Data retention: 20 years at 85°C/100 years at 25°C(1)
       – Optional Boot Code Section with Independent Lock Bits • In-System            Programming by On-chip Boot Program
• True Read-While-Write Operation
       – Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 Compliant) Interface
      – Boundary-scan Capabilities According to the JTAG Standard
      – Extensive On-chip Debug Support
      – Programming of Flash, EEPROM, Fuses, and Lock Bits through the            JTAG Interface
• QTouch® Library Support
      – Capacitive touch buttons, sliders and wheels
      – QTouch and QMatrix™ acquisition
      – Up to 64 sense channels ATmega32A megaAVR® Data SheetÂ
• Peripheral Features
      – Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
      – One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and        Capture Mode
      – Real Time Counter with Separate Oscillator
      – Four PWM Channels
      – 8-channel, 10-bit ADC
• 8 Single-ended Channels
• 7 Differential Channels in TQFP Package Only
• 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
      – Byte-oriented Two-wire Serial Interface
      – Programmable Serial USART
      – Master/Slave SPI Serial Interface
      – Programmable Watchdog Timer with Separate On-chip Oscillator
      – On-chip Analog Comparator
• Special Microcontroller Features
     – Power-on Reset and Programmable Brown-out Detection
     – Internal Calibrated RC Oscillator
     – External and Internal Interrupt Sources
     – Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down,        Standby and Extended Standby
• I/O and Packages
     – 32 Programmable I/O Lines
     – 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
• Operating Voltages
    – 2.7V - 5.5V
• Speed Grades
     – 0 - 16MHz
• Power Consumption at 1MHz, 3V, 25°C
     – Active: 0.6mA
     – Idle Mode: 0.2mA
     – Power-down Mode: < 1µA
Product Information
Product Information
Shipping & Returns
Shipping & Returns
Description
The ATmega32A is a low power, CMOS 8-bit microcontrollers based on the AVR® enhanced RISC architecture. The ATmega32A is a 40/44-pins device with 32 KB Flash, 2 KB SRAM and 1 KB EEPROM. By executing instructions in a single clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed.
Features
• High-performance, Low-power AVR® 8-bit Microcontroller
• Advanced RISC Architecture
      – 131 Powerful Instructions
      – Most Single-clock Cycle Execution
      – 32 × 8 General Purpose Working Registers
      – Fully Static Operation
      – Up to 16MIPS Throughput at 16MHz
       – On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
       – 32Kbytes of In-System Self-programmable Flash program memory
       – 1024Bytes EEPROM
       – 2Kbytes Internal SRAM
       – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
       – Data retention: 20 years at 85°C/100 years at 25°C(1)
       – Optional Boot Code Section with Independent Lock Bits • In-System            Programming by On-chip Boot Program
• True Read-While-Write Operation
       – Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 Compliant) Interface
      – Boundary-scan Capabilities According to the JTAG Standard
      – Extensive On-chip Debug Support
      – Programming of Flash, EEPROM, Fuses, and Lock Bits through the            JTAG Interface
• QTouch® Library Support
      – Capacitive touch buttons, sliders and wheels
      – QTouch and QMatrix™ acquisition
      – Up to 64 sense channels ATmega32A megaAVR® Data SheetÂ
• Peripheral Features
      – Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
      – One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and        Capture Mode
      – Real Time Counter with Separate Oscillator
      – Four PWM Channels
      – 8-channel, 10-bit ADC
• 8 Single-ended Channels
• 7 Differential Channels in TQFP Package Only
• 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
      – Byte-oriented Two-wire Serial Interface
      – Programmable Serial USART
      – Master/Slave SPI Serial Interface
      – Programmable Watchdog Timer with Separate On-chip Oscillator
      – On-chip Analog Comparator
• Special Microcontroller Features
     – Power-on Reset and Programmable Brown-out Detection
     – Internal Calibrated RC Oscillator
     – External and Internal Interrupt Sources
     – Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down,        Standby and Extended Standby
• I/O and Packages
     – 32 Programmable I/O Lines
     – 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
• Operating Voltages
    – 2.7V - 5.5V
• Speed Grades
     – 0 - 16MHz
• Power Consumption at 1MHz, 3V, 25°C
     – Active: 0.6mA
     – Idle Mode: 0.2mA
     – Power-down Mode: < 1µA



